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TB62802FG 2006-06-14 1 toshiba bi-cmos integrated circuit silicon monolithic TB62802FG ccd clock drivers the TB62802FG is a clock distribution driver for ccd linear image sensors. the ic can functionally drive the ccd input capacitance. it also supports inverted outputs, eliminating the need for crosspoint control. the ic contains a 1-to-4 clock distribution driver and 4-bit buffer. the suffix (g) appended to the part number represents a lead (pb) -free product. features ? high drivability: guaranteed driving 250 pf load capacitance @fclock = 25 mhz (4-bit distribution driver) ? operating temperature range: ta = 0c to 60c pin connection (top view) weight: 0.5 g (typ.) 1 2 3 4 16 5 6 7 8 15 14 13 12 11 10 9 out_cont 2b_in cp_in v cc1 gnd1 v cc2 ck_in sh_in rs_in 2b_out cp_out gnd2 sh_out rs_out
TB62802FG 2006-06-14 2 logic diagram pin description pin no. pin name functions remarks 1 out_cont output control pin ? 2 2b_in light load drive input driver input for ccd last-stage clock 3 cp_in light load drive input ccd clamp gate driver input 4 v cc1 light load power supply ? ? gnd1 light load ground ? 5 v cc2 heavy load power supply ? 6 ck_in heavy load drive input driv er input for ccd transfer clock 7 sh_in light load drive input ccd shift gate driver input 8 rs_in light load drive input ccd reset gate driver input 9 rs_out light load drive output (not inverted) ccd reset gate driver output 10 sh_out light load drive output (not inverted) ccd shift gate driver output 11 heavy load drive output (not inverted ) driver output for ccd transfer clock 12 heavy load drive output (inverted) driver output for ccd transfer clock ? gnd2 heavy load ground ? 13 heavy load drive output (inverted) driver output for ccd transfer clock 14 heavy load drive output (not inverted ) driver output for ccd transfer clock 15 cp_out light load drive output (not inverted) ccd clamp gate driver output 16 2b_out light load drive output (not inve rted) driver output for ccd last-stage clock note: the internal circuits for heavy load drive pins and have the same configuration as those of light load drive pins rs_out, sh_out, cp_out and 2b_out. thus, these internal circuits have the same characteristics. ck_in cp_out cp_in sh_out sh_in rs_out rs_in 2b_out 2b_in out_cont
TB62802FG 2006-06-14 3 truth table input output pin name logic pin name logic pin name logic l l h h ck_in h l l l cp_in h cp_out h l l sh_in h sh_out h l l rs_in h rs_out h l l l 2b_in h 2b_out h out_cont h ? ? all output l absolute maximum ratings (ta = 25c) characteristic symbol rating unit power supply voltage v cc ? 0.5 to 7.0 v input voltage v in ? 1.2 to v cc + 0.5 v output voltage v o ? 0.5 to v cc v input clamp diode current (v in < 0) i ik ? 50.0 ma output clamp diode current (v o < 0) i ok ? 50.0 ma high level i oh (o) ? 16.0 ma output current excluding other than , outputs low level i ol (o) + 16.0 ma high level i oh ( ) ? 150 ma output current low level i ol ( ) 150 ma storage temperature t stg ? 40 to 150 c junction temperature t j 150 c thermal resistance chip to ambient air ja 83 c/w note: output current is specified as follows: v oh = 4.0 v, v ol = 0.5 v.
TB62802FG 2006-06-14 4 recommended operating conditions (ta = 25c) characteristic symbol min typ. max unit power supply voltage v cc 4.7 5.0 5.5 v input voltage v in 0 ? v cc v output voltage v o 0 ? v cc v high level v oh (o) ? ? ? 8.0 ma output current excluding , outputs low level v ol (o) ? ? 8.0 ma high level v oh ( ) ? ? ? 10.0 ma output current low level v ol ( ) ? ? 10.0 ma thermal resistance (chip to case) jc ? 12 ? c/w operating temperature t opr 0 25 60 c input rise/fall time (note) tri/tfi ? 2.5 5.0 ns note: there is no hysteresis in the input block of this ic. therefore attention should be given to the following: a cmos integrated circuit charges and discharges the capacitance load (internal equivalent capacitance) of the internal circuit while operating. the charged or discharged current flows in the package of the ic and inductance of transmission line, which causes inductive spike voltage to be generated. when the spike voltage is generated in the reference gnd, it affects the amplitude of an input signal. the amplitude seems to be fluctuating compared to when no spike voltage is generated in the reference gnd. in this case, some induced spike waveforms exceed the input threshold level. for low-frequency inputs, the rate at which a spike exceeds the level increases, resulting in unstable output. therefore, do not apply input signals lower than 1 s. when designing a board, be sure to take transmission line inductance into consideration.
TB62802FG 2006-06-14 5 electrical characteristics dc characteristics (unless otherwise specified, v cc = 4.7 to 5.5 v, ta = 0 to 60c) characteristic symbol test circuit test condition v cc min typ. max unit high v ih 4.7 2.0 ? v cc input voltage low v il 1 4.7 0 ? 0.8 v input clamp voltage v ik 2 i ik = ? 20 ma 4.7 ? ? 1.0 v i oh = ? 50 a 4.7 4.5 ? v cc v oh (o) 3 i oh = ? 8 ma 4.7 3.9 ? v cc i ol = 50 a 4.7 0 ? 0.2 output voltage excluding , outputs v ol (o) 5 i ol = 8 ma 4.7 0 ? 0.7 v i oh = ? 10 ma 4.7 4.5 ? v cc i oh = ? 30 ma 4.7 3.9 ? v cc v oh ( / ) 3, 4 i oh = ? 120 ma 4.7 3.0 ? v cc i ol = 50 a 4.7 0 ? 0.3 i ol = 30 ma 4.7 0 ? 0.5 output voltage v ol ( / ) 5, 6 i ol = 120 ma 4.7 0 ? 2.0 v input voltage i in 7 v in = v cc or gnd 5.5 ? ? 1.0 a total i cc 8 for light load output, all bits are high. for heavy load output, 2 bits are high. 2 bits are low. 5.5 ? ? 15.0 forced low for all bits i ccl ? out_cont = ?h? 5.5 ? ? 30.0 static current consumption each bit ? i cc 9 one input : v in = 0.5 v or v cc ? 2.1 v other inputs : v in = v cc or gnd ? ? ? 1.5 ma output off mode supply voltage v por (note) light load power supply (v cc1 ) reference ? ? 3.0 ? v note: refer to the description of the p.o.r below. mode in which output is held at low at power-on (p.o.r: p ower o n r eset circuit) to eliminate the unstable period for the internal logic, this ic incorporates a function for monitoring the light load power supply (v cc1 ) at power-on to maintain the outputs at low. ? at power-on, all output are held at low until light load power supply (v cc1 ) reaches the voltage level of 3 v. ? when the light load power supply (v cc1 ) voltage is higher than 3 v (typ.), the internal logic operates according to input signals. ? for normal operation, be sure to use a power supply of 4.7 v or higher as guaranteed. power v cc dut output signal waveform pulse generator p.o.r test circuit gnd supply voltage 3 v output signal waveform v cc time low level state refer to subsection 10. ?propagation delay time? in ac parameters.
TB62802FG 2006-06-14 6 ac characteristics (input transition rise or fall time: t r /t f = 3.0 ns) ta = 25c, v cc = 5.0 v ta = 0 to 60c v cc = 4.7 to 5.5 v characteristic symbol test condition min typ. max min max unit reference measurement diagram tplh ( ) 5.3 10.8 15.5 5.0 16.0 tphl ( ) c l = 250 pf 5.3 9.8 15.5 5.0 16.0 measurement diagram 1 tplh (o) 2.5 5.4 9.5 2.0 10.0 propagation delay time tphl (o) c l = 20 pf 2.5 6.0 10.5 2.0 12.0 ns measurement diagram 2 tpclh ( ) 9.5 14.0 24.0 9.0 25.0 tpchl ( ) c l = 250 pf 9.5 15.4 24.0 9.0 25.0 measurement diagram 1 tpclh (o) 7.2 10.7 19.0 6.0 23.0 output off time tpchl (o) c l = 20 pf 7.3 18.5 30.0 6.0 35.0 ns measurement diagram 2 light load drive output skew to (skw) c l = 20 pf 0 ? 2.0 0 2.0 ns measurement diagram 3 heavy load drive output crosspoints vt (crs) c l = 100 to 250 pf 1.5 ? ? 1.5 ? v measurement diagram 4 cpd ( ) ? 57 ? ? ? equivalent internal capacitance (note 1) cpd (o) ? 18 ? ? ? pf note 1: cpd denotes ?power dissipation capacitance?. dynamic power dissipation can be calculated using the cpd value. pd = [cpd v cc 2 fin] + (cl v cc 2 fout) cl: load capacitance per output cpd: power dissipation capacitance fin: input clock frequency fout: output clock frequency for example: for heavy load drive output, driving a load capacity of 250 pf at 25 mhz; for light load drive output, driving a load capacity of 20 pf at 25 mhz. note 2: in practice, the frequencies of some shift gate control signals are lower than the transfer clock. therefore the power dissipation during practical use is smaller than the calculated value below. pd = [57 pf 5.0 v 5.0 v 25 mhz] 4 bit + (250 pf 5.0 v 5.0 v 25 mhz) 4 bit + [18 pf 5.0 v 5.0 v 25 mhz] 4 bit + (20 pf 5.0 v 5.0 v 25 mhz) 4 bit ? 862 mw the typical power dissipation is approximately 862 mw. notes on system design as shown above, the TB62802FG consumes high current while operating. there is temporary flow of a current greater than the calculated value. to suppress bouncing from the power supply and gnd, decoupling for the power supply is a vital necessity. below is an example of how the capacitance of a decoupling capacitor is calculated. be sure to refer to this when designing a system. the decoupling capacitor should be placed underneath the ic to reduce the high-frequency components. supply current variable: 350 ma (estimated variable in 1 bit) supply voltage variable: 0.3 v noise pulse width: 10 ns (time in which fluctuation occurs) c = ? i cc /( ? v/ ? t) = 350 ma 4 bit/(0.3 v/10 ns) ? 47 nf ? 0.047 f (when using a normal capacitor) to control the fluctuation in the low-frequency components, it is recommended that the power supply on the board be decoupled using a 10 f to 50 f capacitor.
TB62802FG 2006-06-14 7 reference characteristics thermal design the junction temperature is expressed as follows: t j = ta + ( jc + ca) pd = ta + ja pd t j : junction temperature ta: ambient temperature jc: thermal resistance from chip to case (a specific value not affected by environment) ja: thermal resistance from chip to ambient temperature (affected by environment) pd: power dissipation when driving external load here, the thermal performance of the heat dispersion on the pcb and of the ambient temperature setting should be so designed that the calculated value is within the specified range. load capacitance vs. power dissipation power dissipation w load capacitance pf 0 1.2 0 0.4 0.8 1 0.6 0.2 20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 drive frequency: 25 mhz (all bits are driven at the same frequency) supply voltage: 5.0 v light load capacitance: 20 pf light load internal equivalent capacitance: 18 pf heavy load internal equivalent capacitance: 57 pf ambient temperature: 25c power dissipation and junction temperature (reference value) power dissipation w junction temperature c drive frequency mhz 0.00 1.0 3.0 5.0 7.0 9.0 11.0 13.0 15.0 17.0 19.0 21.0 23.0 25.0 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 120 0 60 20 40 80 100 condition: (1) power dissipation ic internal equivalent capacitance heavy load = 57 pf light load = 18 pf ccd input capacitance main clock = 250 pf control clock = 20 pf driver supply voltage = 5.0 v driver output amplitude = 5.0 v the main clock and control clock oscillate at the same frequency. (2) junction temperature ta = 25c ja = 83.3c/w (typical value for the ic itself) power dissipation junction temperature
TB62802FG 2006-06-14 8 propagation delay time capacitance dependency of the TB62802FG heavy load drive pin propagation delay time ns load capacitance pf propagation delay time capacitance dependency of the TB62802FG light load drive pin propagation delay time ns load capacitance pf 0 100 2.0 4.0 6.0 8.0 10.0 14.0 12.0 200 250 300 tphl tplh tplh tphl condition: v cc = 5.0 v, ambient temperature = 25c 0 10 1.0 2.0 3.0 4.0 5.0 7.0 6.0 20 tplh (o) tphl (o) condition: v cc = 5.0 v, ambient temperature = 25c
TB62802FG 2006-06-14 9 waveform measuring point propagation delay time setting input signal ?2b_in ?ck_in ?sh_in ?rs_in ?cp_in ?out_cont measurement diagram 1 ? output signal ? output signal measurement diagram 2 ?2b_out ?ck_out ?sh_out ?rs_out ?cp_out measurement diagram 3 ?2b_out ?ck_out ?sh_out ?rs_out ?cp_out output waveform crosspoint/level setting measurement diagram 4 ? output signal ? output signal 10% 90% 1.5 v tri 10% 90% 1.5 v tfi gnd 3.0 v v cc ? 0.5 v tplh ( ) tphl ( ) gnd + 0.5 v tphl ( ) tplh ( ) v cc ? 0.5 v gnd + 0.5 v v cc ? 0.5 v tplh (o) tphl (o) gnd + 0.5 v v cc gnd v cc gnd v cc gnd v cc gnd to (skw) to (skw) v ol v t (crs) v oh gnd v ol v t (crs) v oh gnd
TB62802FG 2006-06-14 10 test circuit dc parameters pins marked with an asterisk ( * ) are test pins. be sure to ground those input pins that are not used as test pins so that the logic is determined. unless otherwise specified, bits of the same type are measured in the same way. 1. v ih /v il (1) light load drive bits note 1: when measuring input pins, connect to gnd those input pins that are not being measured. (2) heavy load drive bits note 2: connect to gnd those input pins that are not being measured. 1 2 3 4 16 5 6 7 8 15 14 13 12 11 10 9 4.7 v 0 to v cc 20 pf e.g., oscilloscope ? ? ? ? 1 2 3 4 16 5 6 7 8 15 14 13 12 11 10 9 4.7 v 0 to v cc 250 pf e.g., oscilloscope ?
TB62802FG 2006-06-14 11 2. v ik note 1: when measuring input pins, connect to gnd those input pins that are not being measured. 3. v oh (o/ ) note 2: connect to gnd those input pins that are not being measured. 1 2 3 4 16 5 6 7 8 15 14 13 12 11 10 9 4.7 v ? ? ? ? ? v ? 20 ma ? 1 2 3 4 16 5 6 7 8 15 14 13 12 11 10 9 4.7 v ? ? v o output: ? 8 ma output: ? 120 ma ? ? ? ?
TB62802FG 2006-06-14 12 4. v oh ( ) note 1: connect to gnd those input pins that are not being measured. 5. v ol (o/ ) note 2 connect to gnd those input pins that are not being measured. 1 2 3 4 16 5 6 7 8 15 14 13 12 11 10 9 4.7 v ? v output: ? 120 ma ? 1 2 3 4 16 5 6 7 8 15 14 13 12 11 10 9 4.7 v ? v o output: 8 ma output: 120 ma ? ? ? ? ? 4.7 v
TB62802FG 2006-06-14 13 6. v ol ( ) note 1: connect to gnd those input pins that are not being measured. 7. i in note 2: connect to gnd those input pins that are not being measured. 1 2 3 4 16 5 6 7 8 15 14 13 12 11 10 9 5.5 v ? ? ? ? ? ? 5.5 v a a 1 2 3 4 16 5 6 7 8 15 14 13 12 11 10 9 4.7 v ? v output: 120 ma ? 4.7 v
TB62802FG 2006-06-14 14 8. i cc note 1: the input logic of the heavy load drive clock input pin (pin 6) is the same for high or low. 9. ? i cc note 2: when measuring input pins, connect to gnd (or to the power supply) those input pins that are not being measured. 1 2 3 4 16 5 6 7 8 15 14 13 12 11 10 9 0 v or 5.5 v ? ? 5.5 v a 1 2 3 4 16 5 6 7 8 15 14 13 12 11 10 9 0.5 v or v cc ? 2.1 v ? ? v cc a
TB62802FG 2006-06-14 15 ac parameters pins marked with an asterisk ( * ) are test pins. ground those input pins that are not being used as test pins so that the logic is determined. unless otherwise specified, bits of the same type are measured in the same way. 10. propagation delay time (1) light load drive bits (2) heavy load drive bits 20 pf e.g., oscilloscope 1 2 3 4 16 5 6 7 8 15 14 13 12 11 10 9 0 to 3 v p-p ? ? v cc ? ? 250 pf e.g., oscilloscope 1 2 3 4 16 5 6 7 8 15 14 13 12 11 10 9 ? ? v cc ? ? 0 to 3 v p-p
TB62802FG 2006-06-14 16 package dimensions weight: 0.5 g (typ.)
TB62802FG 2006-06-14 17 notes on contents 1. block diagrams some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. equivalent circuits the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. timing charts timing charts may be simplified for explanatory purposes. 4. application circuits the application circuits shown in this document are provided for reference purposes only. thorough evaluation is required, especially at the mass production design stage. toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. 5. test circuits components in the test circuits are used only to obtain and confirm the device characteristics. these components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. ic usage considerations notes on handling of ics (1) the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. (2) use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or ic failure. the ic will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. to minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. (3) if your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power on or the negative current resulting from the back electromotive force at power off. ic breakdown may cause injury, smoke or ignition. use a stable power supply with ics with built-in protection functions. if the power supply is unstable, the protection function may not operate, causing ic breakdown. ic breakdown may cause injury, smoke or ignition. (4) do not insert devices in the wrong orientation or incorrectly. make sure that the positive and negative terminals of power supplies are connected properly. otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. in addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time.
TB62802FG 2006-06-14 18 (5) carefully select external components (such as inputs and negative feedback capacitors) and load components (such as speakers), for example, power amp and regulator. if there is a large amount of leakage current such as input or negative feedback condenser, the ic output dc voltage will increase. if this output voltage is connected to a speaker with low input withstand voltage, overcurrent or ic failure can cause smoke or ignition. (the over current can cause smoke or ignition from the ic itself.) in particular, please pay attention when using a bridge tied load (btl) connection type ic that inputs output dc voltage to a speaker directly.
TB62802FG 2006-06-14 19 points to remember on handling of ics (1) heat radiation design in using an ic with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (tj) at any time and condition. these ics generate heat even during normal use. an inadequate ic heat radiation design can lead to decrease in ic life, deterioration of ic characteristics or ic breakdown. in addition, please design the device taking into considerate the effect of ic heat radiation with peripheral components. (2) back-emf when a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor?s power supply due to the effect of back-emf. if the current sink capability of the power supply is small, the device?s motor power supply and output pins might be exposed to conditions beyond absolute maximum ratings. to avoid this problem, take the effect of back-emf into consideration in system design.
TB62802FG 2006-06-14 20 about solderability, following conditions were confirmed ? solderability (1) use of sn-37pb solder bath solder bath temperature = 230c dipping time = 5 seconds the number of times = once use of r-type flux (2) use of sn-3.0ag-0.5cu solder bath solder bath temperature = 245c dipping time = 5 seconds the number of times = once use of r-type flux restrictions on product use 060116eb a ? the information contained herein is subject to change without notice. 021023_d ? toshiba is continually working to improve the quality an d reliability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inhe rent electrical sensitivity and vulnerability to physical stress. it is the responsibility of the buyer, when utilizing toshiba products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury or damage to property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshiba products specifications. also, please keep in mind the precautions and conditions set forth in the ?handling guide for semiconductor devices,? or ?toshiba semiconductor reliability handbook? etc. 021023_a ? the toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc. unintended usage of toshiba products listed in this document shall be made at the customer?s own risk. 021023_b ? the products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. 060106_q ? the information contained herein is presented only as a guide for the applications of our products. no responsibility is assumed by toshiba for any infringements of patents or other rights of the third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of toshiba or others. 021023_c ? the products described in this document are subject to the foreign exchange and foreign trade laws. 021023_e

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